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Start this project for simulating FET based logic
authorLukáš Jiřiště <gymnazium.jiriste@gmail.com>
Sat, 13 Jan 2024 10:55:36 +0000 (11:55 +0100)
committerLukáš Jiřiště <gymnazium.jiriste@gmail.com>
Sat, 13 Jan 2024 10:55:36 +0000 (11:55 +0100)
commit3535c42fd8707295d7685217765152095afd5433
tree65ec366aceddfd4483d8331c2ac2742e81aa24a6tree | snapshot (zip tar.gz)
Start this project for simulating FET based logic

Add a small project capable(?) of simulating FET logic. Implement basic
structs and logic for the simulation.
Implement depicting of the simulation state.
Add submodule Libft for use in place of (most of) standard library.
 - I develop this project for other reasons.
 - This is an added challenge for learning's sake.
Add basics of project management (Makefile, .gitignore).
.gitignore [new file with mode: 0644] blob
.gitmodules [new file with mode: 0644] blob
Libft [new submodule] blob
Makefile [new file with mode: 0644] blob
main.c [new file with mode: 0644] blob
Unnamed repository; edit this file 'description' to name the repository.